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The key is that you use a shared virtual address model. That means you're caching virtual addresses. So address translation only happens on last level cache misses, making it less critical for performance (giving your more options for how to implement it in terms of power, area, etc.). Protection st...

Have you considered a shared virtual address space model? That puts the TLB on the slow path (only on cache miss, since you'd cache virtual addresses). You could use your idea of a small number of variable size regions for protection only, since that still has to be fast. EDIT: to clarify that last ...