Hardware acceleration of hash tables?

discussion of forwardcom instruction set and corresponding hardware and software

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isiahmeadows
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Joined: 2019-06-22, 22:30:44

Hardware acceleration of hash tables?

Post by isiahmeadows »

Something I discovered recently is that apparently, a common hash function family used for hash tables to avoid hash-flooding DoS attacks, SipHash, is very easily optimized in hardware: https://twitter.com/isiahmeadows1/statu ... 1419297793. It's normally relatively slow in software, slower than most other hash functions (nearly all insecure) used for hash tables, but in hardware, the complexity of even their recommended conservative option, SipHash 4-8, should be no worse than that of multiplication modulo 2^64 in both propagation delay, gate count, and bridge count, likely even less. With a static 64-bit (or 128-bit) input, I suspect it'd be doable in a single clock cycle, with the propagation delay strongly dwarfed by the speed of decoding, loading registers, and other related boilerplate.

I don't want to recommend further specialized instructions aimed at accelerating hash tables, as they're still an active point of research and are still under a lot of flux as people try to figure out how best to make cache-friendly hash tables. (There's also almost nothing on how to handle them in hardware, with or without internal RAM.)
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